Dear PSIM,
I read the LLC example from PSIM 2021a and smartcontrol. Most of the topics are covered only the voltage loop control with smart control tunning.
Is there any example is discussed about the “current loop” control for LLC converter? or any “double loop” control design for LLC converter for the example?
Regards,
Hi @jsoo3118,
Thanks for your question!
Please find the attached PSIM schematics that deal with the current loop and as well as double-loop control of resonant LLC.
The other two schematics deal with the proper implementation of AC sweep for the inner current loop and outer voltage loop.
Resonant LLC - (Close loop current mode).psimsch (85.8 KB) parameters-main-ac sweep-close-loop-current-mode.txt (2.2 KB) Resonant LLC - (Close loop current mode).psimsch (85.8 KB) Resonant LLC - (Current Loop AC sweep-digital).psimsch (82.1 KB) Resonant LLC - (Both Inner Current and Outer Voltage Loop).psimsch (87.3 KB) Resonant LLC - (Outer Volatge Loop AC Sweep).psimsch (87.6 KB)
Regards,
Amit
Dear Amir,
I have few question on the double loop and inner current loop for this LLC example. I saw the example regarding the current sensor was placing after the secondary side of diode bridge rectifier.
The current feedback reference signal was also passing through a 10kHz to connect to the summer (+/-).
I realized that the I_sec is in high frequency switching current and I_fb is through a low pass filter so down to 10kHz switching current. In this case, if we design a double loop (outer voltage and inner current) for this LLC converter. Will the inner current loop is faster than the outer voltage loop?
I also referred back some of the basic buck, boost and buck-boost examples usually the current sensor did not put any low pass filter which allows the inner current loop always faster than the outer voltage loop. Let me know if i am understanding wrong. Thanks Amit for your great supports.
Hi @jsoo3118,
I_sec has considerably high harmonic content and it can be in DCM too if you are operating below resonnat. There are other modes too that change with frequency, Q and K. I_sec needs some filtering.
We are just filtering here those harmonics to have a somewhat a dc value as I_fb. Then we can inject small ac perturbation to see the impact of ac small signal over the I_fb.
Also as we maybe aware that the PI controller we design either for voltage loop or current loop works better for error in dc quantities hence I_fb needs to be a somewhat filtered as a dc quantity.
Then we get open loop current loop response and we can see there the open loop bandwidth. Based on controller design we can select the inner bandwidth to be 1/5 to 1/10 of the lowest switching frequency. Then the bandwidth of the outer voltage loop is 1/5th to 1/10th of the inner loop. Hence, the current loop response is still faster than the voltage loop response in this case.
This is how I have designed this particular dual close loop on resonant LLC.
I hope I have understand your question and answered satisfactorily.
Please let me know if I am getting it correct and if you have any other questions.
Regards,
Amit
Hi Amit,
Thanks for your clarification. I checked the cross over frequency from the bode plot and I saw that the current loop has much higher bandwidth than the outer loop.
Also thanks for pointing out why the sensor is designed at the secondary side.
Regards,
Dear @Amit_Kumar,
why the low pass filter didn’t use on the digital low pass filter to simulate under digital domain LLC simulation? I realized that the internal resettable which is also using the analog type to simulate digital domain? Can you please explain this and actually I tried to replace it to discrete integrator of internal resettable, it seems doesn’t working well.
